The present invention relates generally to analog to digital converters and, more particularly, to an analog to digital data acquisition system with reduced offset and noise.
Data acquisition systems are widely used in modern electronic equipment for converting analog signals to digital signals. These data acquisition systems include a programmable gain amplifier (PGA) and an analog-to-digital converter (ADC). The PGA amplifies an analog input signal and provides the amplified signal to the ADC. The ADC then converts the amplified analog signal to a digital signal in one or more ADC conversion cycles.
However, the PGA adds offset and noise to the analog input signal during amplification, which gets carried forward and degrades the quality of the digital signal generated by the ADC. When such data acquisition systems are used in high-precision industrial, automotive, and medical applications, the offset and noise limits the accuracy of the output.
Conventional data acquisition systems use a chopper-stabilized PGA to reduce offset and low frequency noise. The chopper includes electronic switching devices and circuits for up-modulating the frequency of offset and noise components to a predefined high frequency. A low pass filter (LPF) is connected to the output of the PGA to filter the up-modulated noise and offset signals. However, LPFs are expensive, increase the cost of such data acquisition systems and occupy silicon area.
It would be advantageous to have a data acquisition system that is cost effective, does not require a LPF, has a small area footprint, and that overcomes the above-mentioned limitations of existing data acquisition systems.